1. Field of Invention
The present invention relates to a liquid crystal display device designed to have lower swing voltage to a data line in order to reduce power consumption. Additionally, the present invention relates to a driving circuit, to a driving method, and to electronic devices having the liquid crystal display device.
2. Description of Related Art
In recent years, liquid crystal display devices (LCD) have been used widely for various information processing devices, flat-screen TVs, and the like as display devices to replace cathode ray tubes (CRT).
These liquid crystal display devices can be classified into various types depending on the driving method and so on. An active-matrix-type LCD device, in which pixels are driven by switching elements, can be arranged as follows. Specifically, an active-matrix-type LCD device can include pixel electrodes arranged in a matrix, an element substrate provided with switching elements connected to each of the pixel electrodes, a counter substrate on which counter electrodes are formed to face the pixel electrodes, and liquid crystal sandwiched between both of these substrates.
In this arrangement, when an on-voltage is applied to a scanning line, the switching element connected to the scanning line becomes conductive. In the conductive state, if the voltage signal corresponding to a gray scale (density) is applied to an element electrode via a data line, the charge corresponding to the voltage signal is stored in a liquid crystal capacitor in which the liquid crystal is sandwiched between the element electrode and counter electrode. After the charge is stored, even if an off-voltage is applied to the scanning line to make the switching element nonconductive, the charge stored in the liquid crystal is maintained by the capacitance of the liquid crystal capacitor itself, in addition to the accompanying storage capacitor.
In this manner, by driving each switching element and controlling the amount of charge to be stored according to the gray scale, the orientation of the liquid crystal changes. Thus, the gray level is changed for every pixel, thereby making it possible to perform display as desired.
Also, in recent years, a scheme has been proposed to arrange D/A converters for every data line to convert gray scale data indicating the gray level of a pixel into an analog signal. With this scheme, image data is digitally processed immediately before it is output to the data line, thus deterioration of the display quality due to variations in analog circuit characteristics is prevented, thereby making it possible to obtain a high quality display.
For performing gray-scale display, it is necessary to apply a voltage with a range corresponding to values from the minimum gray level to the maximum gray level to the pixel electrodes in two separate ways, namely, positive polarity and negative polarity. Accordingly, the swing voltage between the minimum value and the maximum value which is required to be applied to a pixel electrode becomes greater than the swing of the logic level of CMOS circuits and so on.
However, increasing the swing voltage applied to the pixel electrode inevitably results in an increase in the swing voltage applied to the data line. If the swing voltage applied to the data line is increased, electrical power is wastefully consumed by a parasitic capacitance on the data line. Such a result is contrary to the demands generally made on liquid crystal devices for lowering the power consumption.
Also, when the swing voltage applied to the data line is increased, the output swing voltage from the D/A converter needs to be increased. Thus, the composition of the D/A converter becomes large, or a separate level shifter becomes necessary to amplify the output voltage.
Accordingly, the present invention is made in view of the foregoing, and an object of the invention is to keep the swing voltage applied to various signals, especially a data line, small, thereby providing a liquid crystal device, a driving circuit, a driving method, and electronic devices which are intended to reduce power consumption.
In order to accomplish the above-described object, in a liquid crystal device according to a first aspect of the present invention, there is provided a liquid crystal device including a scanning line to which an on-voltage is applied and then an off-voltage is applied, a liquid crystal capacitor having a liquid crystal sandwiched between a counter electrode and a pixel electrode, a D/A converter applying a voltage, which corresponds to gray scale data indicating a gray level and to a writing polarity of the liquid crystal, to a data line when an on-voltage is applied to the scanning line, and a switching element inserted between the data line and the pixel electrode, the switching element being turned on when the on-voltage is applied to the scanning line, and being turned off when an off-voltage is applied.
The liquid crystal device can further include a storage capacitor having one terminal connected to the pixel electrode, wherein, when the writing polarity during the period when the on-voltage is applied to the scanning line is equivalent to positive-polarity writing, the voltage of the other terminal is shifted to a high level when the off-voltage is applied to the scanning line, and when the writing polarity during the period when on-voltage is applied to the scanning line is equivalent to negative-polarity writing, the voltage of the other terminal is shifted to a low level when the off-voltage is applied to the scanning line.
With this arrangement, when on-voltage is applied to the scanning line, the switching element connected to the scanning line can be turned on, thereby the charge corresponding to the applied voltage is stored to the liquid crystal capacitor and storage electrode. When the switching element is turned off thereafter, the voltage of the other terminal of the storage capacitor shifts, and the voltage of one terminal of storage capacitor is raised by that amount (or lowered). At the same time, the amount of charge raised (or lowered) is distributed to the liquid crystal capacitor, thus the voltage effective value corresponding more than (or less than) the applied voltage to the data line is applied to the liquid crystal capacitor. In other words, when compared with the swing voltage applied to the pixel electrode, the swing voltage of the voltage signal applied to the data line is kept small. Thus, wasteful power consumption by parasitic capacitor on the data line is kept small, thereby making it possible to reduce power consumption. Additionally, enlarging the D/A converter is prevented, or level shifter for enlarging the output voltage of a D/A converter becomes unnecessary, thereby making it possible to narrow the pitch of a data line so as to achieve high precision.
Here, in the first aspect of the present invention, it is preferable to have the arrangement that in the case where the writing polarity is one of positive polarity writing and negative polarity writing, the display device further can further include a first power feeding line which is fed with a first voltage during a preset period, and which is fed with a second voltage which is higher than the first voltage during a set period after the preset period, a second power feeding line which is fed with a third voltage which is higher than the second voltage during the preset period, and which is fed with a fourth voltage which is lower than the third voltage and higher than the second voltage during the set period, and a selector to select one of the first and second power feeding lines during the preset period, and to select the other one of the first and second power feeding lines during the set period, wherein the D/A converter generates a supply voltage to the data line using the corresponding voltage selected by the selector during the preset period and the set period.
If the D/A converter is arranged such that in the case of using a first voltage during preset period, it uses a fourth voltage during the set period, whereas in the case of using a third voltage during the preset period, it uses a second voltage during the set period, the arrangement can be simply considered such that the first and fourth voltage is applied via one power feeding line, whereas the third and second voltage is applied via the other one line.
However, in such an arrangement, the swing voltage of two power feeding lines increases, thus the power is wastefully consumed by the parasitic capacitor on these lines.
Accordingly, at the time of transition from the preset period to the set period, if it is arranged such that the selector switches power feeding from one to the other one of the first and second power feeding lines, the voltage transition of both power feeding lines are kept small, thus power consumption can be reduced further more.
In addition, in the arrangement of switching power feeding from one to the other one of the first and second power feeding lines by the selector, it is also preferable that, in the case where the writing polarity is the other one of positive-polarity writing and negative-polarity writing, the first power feeding line is fed with a fifth voltage during the preset period, and is fed with a sixth voltage which is higher than the fifth voltage during the set period after the preset period, whereas the second power feeding line is fed with a seventh voltage which is higher than the sixth voltage during the preset period, and is fed with an eighth voltage which is lower than the seventh voltage and higher than the sixth voltage during the set period. In this arrangement, the voltage transition of both power feeding lines are kept small not only at the transition from the preset period to the set period, but also the transition of writing polarity from one to the other one of positive-polarity writing and negative-polarity writing.
Also, a D/A converter according to the first aspect preferably includes, in the case where the writing polarity is one of positive-polarity writing and negative-polarity writing, a first switch that applies either a first or third voltage to the data line corresponding to upper bits of the gray scale data during a preset period, and a capacitor having a capacitance corresponding to the lower bits excluding the upper bits from the gray scale data, wherein, in the case where the first voltage is applied to the data line, a fourth voltage which is higher than the first voltage is applied to one terminal, whereas, in the case where the third voltage is applied to the data line, a second voltage which is higher than the third voltage is applied to one terminal, and the other terminal is connected to the data line during a set period after the preset period.
In this arrangement, when the first or third voltage is applied to the data line by the first switch depending on the upper bits of gray scale data during the preset period, the charge corresponding to the applied voltage is stored in the parasitic capacitance of the data line. Then, during the set period, the capacitance corresponding to the lower bits of the gray scale data, and the fourth or second voltage is applied to one terminal of the capacitor, and the other terminal is connected to the data line, the charge stored in the capacitor moves to the parasitic capacitor of the data line, or on the contrary, the charge stored in the parasitic capacitor of the data line moves to the capacitor, and the voltages level off. As a result, the voltage corresponding to gray scale bits is applied to the data line. This means that at the time of performing D/A conversion, the parasitic capacitor of the data line is utilized, thereby simplifying the structure.
In this case, there is an arrangement that a capacitor of D/A converter includes a bit capacitor corresponding to weighting of the lower bits, and a second switch which is arranged corresponding to the bit capacitor, and is turned on or off depending to the lower bits. With this arrangement, it is easy to form a capacitor having the capacity corresponding to the lower bits of the gray scale data.
If the D/A converter which includes a first switch and capacitor is arranged such that in the case of using a first voltage during preset period, the converter uses the fourth voltage during set period, whereas in the case of using the third voltage during preset period, the converter uses the second voltage during set period, the arrangement can be simply considered such that the first and fourth voltage is applied via one power feeding line, whereas the third and second voltage is applied via the other one line.
However, in such arrangement, the swing voltage of two power feeding lines becomes large, thus the power is consumed worthlessly by the parasitic capacitor on these lines.
Thus, in the arrangement in which a D/A converter includes a first switch and capacitor, it is preferable that the converter includes a first power feeding line which is fed with the first voltage during the preset period, and which is fed with the second voltage during the set period, a second power feeding line which is fed with the third voltage during the preset period, and which is fed with the fourth voltage during the set period, and a selector which selects either one of the first power feeding line or the second power feeding line depending on the upper bits, and supplies the voltage which is fed to the selected power feeding line to the input terminal of the first switch during the preset period, and which selects the other one of the first power feeding line or the second power feeding line during the preset period, and feeds the voltage which is fed to the selected power feeding line to one terminal of the capacitor.
In this arrangement, the voltage transition from the preset period to the set period, the power feeding is switched from one to the other one of the first and second power feeding lines by the selector, thus the voltage transition in both power feeding lines are kept small. As a result, power consumption can be further reduced.
Also, in the D/A converter, it is preferable to arrange that, in the case where the writing polarity is the other one of positive-polarity writing and negative-polarity writing, the first switch supplies one of a fifth voltage or a seventh voltage to the data line depending on the upper bits of the gray scale data during the preset period, and one terminal of the capacitor is supplied with an eighth voltage which is higher than the fifth voltage in the case where the data line is supplied with the fifth voltage, whereas one terminal of the capacitor is supplied with a sixth voltage which is lower than the seventh voltage in the case where the data line is supplied with the seventh voltage.
With this arrangement, only by changing the applied voltage during the preset period and the set period, the voltage corresponding to the writing polarity to liquid crystal capacitor can be generated.
Additionally, in the case where a D/A converter changes the applying voltage during the preset period and the set period so as to generate the voltage corresponding to the writing polarity to liquid crystal capacitor, it is preferable that a first power feeding line fed with a fifth voltage during the preset period, and is fed with a sixth voltage during the set period, whereas a second power feeding line is fed with the seventh voltage during the preset period, and being fed with the eighth voltage during the set period. In this arrangement, the voltage transition of both power feeding lines are kept small not only at the transition from the preset period to set period, but also the transition of writing polarity from one to the other one of positive-polarity writing to negative-polarity writing.
At the same time, in the first aspect of the present invention, if the storage capacitor is much larger than the liquid crystal capacitor, the shifted amount of the other terminal of the storage capacitor can be assumed to be applied to the liquid crystal capacitor. However, in practice, there is a limit that the storage capacitor is less than several fold amount of the liquid crystal capacitor, thus the voltage shift amount of the other terminal of the storage capacitor is compressed and applied to the liquid crystal capacitor. If the ratio of the capacitance of the storage capacitor to the liquid crystal capacitor is four or more, the decrease amount of the swing voltage is as little as less than 20%, which is realistic from the layout consideration.
Also, in the first aspect of the present invention, it is preferable that the other terminal of the storage capacitor is commonly connected per each line via a capacitor line. With this arrangement, the liquid crystal capacitor can be inverted for every scanning line (row inversion) or inverted for every vertical scanning period (frame inversion).
Furthermore, the electronic devices according to the present invention are equipped with the above-described liquid crystal display devices, thereby making it possible to reduce power consumption. In this regard, these devices include projectors for extended projection of images, personal computers, and mobile phones.
In this regard, the first aspect described above can be accomplished as a driving circuit for a liquid crystal display device. Specifically, a driving circuit for a liquid crystal display device according to a second aspect of the present invention, in which the display device includes, a liquid crystal capacitor arranged at the intersection of a scanning line and a data line, and having a liquid crystal sandwiched between a counter electrode and pixel electrode, a switching element inserted between the data line and the pixel electrode, the switching element being turned on when an on-voltage is applied to the scanning line, and being turned off when an off-voltage is applied to the scanning line, and a capacitor of which one terminal is connected to the pixel electrode, the driving circuit includes a scanning line driving circuit applying the on-voltage to the scanning line, and then applying the off-voltage to the scanning line, a D/A converter applying a voltage corresponding to gray scale data indicating a gray level, and corresponding to a writing polarity of the liquid crystal, to a data line when the scanning line driving circuit applies the on-voltage to the scanning line, and a storage capacitor driving circuit wherein, when, in the case of applying the on-voltage to the scanning line, the voltage applied to the data line is equivalent to positive-polarity writing, then the voltage of another terminal is shifted to high when the off-voltage is applied to the scanning line, and when in the case of applying the on-voltage to the scanning line, the voltage applied to the data line is equivalent to negative-polarity writing when the off-voltage is applied to the scanning line, then the voltage of the other terminal of the storage capacitor is shifted to low.
With this arrangement, in the same manner as the first aspect of the present invention, compared with the swing voltage applied to the pixel electrode, the swing voltage applied to the voltage signal of the data line can be kept small, thereby making it possible to reduce power consumption, and at the same time the pitches of the data line can be narrowed to achieve high precision.
Additionally, the first aspect described above can be accomplished as a driving method for a liquid crystal display device. Specifically, a driving method for a liquid crystal display device according to a third aspect of the present invention, in which the display device includes a liquid crystal capacitor arranged at the intersection of a scanning line and a data line, and having a liquid crystal sandwiched between a counter electrode and pixel electrode, and a switching element inserted between the data line and the pixel electrode, the switching element being turned on when an on-voltage is applied to the scanning line, and being turned off when an off-voltage is applied to the scanning line, and a capacitor of which one terminal is connected to the pixel electrode.
The driving method can include applying an on-voltage to the scanning line, applying a voltage corresponding to gray scale data indicating a gray scale, and corresponding to a writing polarity of the liquid crystal to a data line, applying off-voltage to the scanning line if the writing polarity to the data line is equivalent to positive-polarity writing, shifting the voltage of another terminal to high, and if the writing polarity to the scanning line is equivalent to negative-polarity writing, shifting the voltage of the other terminal of the storage capacitor to low when the off-voltage is applied to the scanning line.
With this arrangement, in the same manner as the first and second aspects of the present invention, compared with the swing voltage applied to the pixel electrode, the swing voltage applied to the voltage signal of the data line can be kept small, thereby making it possible to reduce power consumption, and at the same time the pitches of the data line can be narrowed to achieve high precision.